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15.3.89  src/lib/compiler/back/low/code/machcode-form.api

## machcode-form.api -- derived from   ~/src/sml/nj/smlnj-110.58/new/new/src/MLRISC/instructions/instructions.sig
#
# This api specifies an abstract view of an instruction set.
#
# The idea is that the Base_Op datatype will define
# one constructor for each target-architecture machine instruction.
#
# Machcode allows us to do tasks like instruction selection and peephole optimization
#  (not currently implemented) without yet worrying about the details of the actual
# target-architecture binary encoding of instructions.
#
# For concrete instantiations see:
#
#     src/lib/compiler/back/low/pwrpc32/code/machcode-pwrpc32.codemade.api
#     src/lib/compiler/back/low/sparc32/code/machcode-sparc32.codemade.api
#     src/lib/compiler/back/low/intel32/code/machcode-intel32.codemade.api
#
#     src/lib/compiler/back/low/pwrpc32/code/machcode-pwrpc32-g.codemade.pkg
#     src/lib/compiler/back/low/sparc32/code/machcode-sparc32-g.codemade.pkg
#     src/lib/compiler/back/low/intel32/code/machcode-intel32-g.codemade.pkg
#
# These are mechanically generated from
#
#     src/lib/compiler/back/low/intel32/intel32.architecture-description
#     src/lib/compiler/back/low/pwrpc32/pwrpc32.architecture-description
#     src/lib/compiler/back/low/sparc32/sparc32.architecture-description
# by
#     src/lib/compiler/back/low/tools/arch/make-sourcecode-for-machcode-xxx-package.pkg
#
# At runtime, machcode representation of the program being compiled is produced by one of

#     src/lib/compiler/back/low/intel32/treecode/translate-treecode-to-machcode-intel32-g.pkg
#     src/lib/compiler/back/low/pwrpc32/treecode/translate-treecode-to-machcode-pwrpc32-g.pkg
#     src/lib/compiler/back/low/sparc32/treecode/translate-treecode-to-machcode-sparc32-g.pkg
#
# Later, absolute executable binary machine code is produced by one of
#
#     src/lib/compiler/back/low/intel32/translate-machcode-to-execode-intel32-g.pkg
#     src/lib/compiler/back/low/pwrpc32/emit/translate-machcode-to-execode-pwrpc32-g.codemade.pkg
#     src/lib/compiler/back/low/sparc32/emit/translate-machcode-to-execode-sparc32-g.codemade.pkg
#
# The former is hand-coded due to the complexity of the x86 architecture binary instruction encoding;
# the latter are mechanically produced from the architecture-description files by
#
#     src/lib/compiler/back/low/tools/arch/make-sourcecode-for-translate-machcode-to-execode-xxx-g-package.pkg
#
# For display purposes, human-readable target-architecture assembly code
# is produced from the machcode representation by one of
#
#     src/lib/compiler/back/low/intel32/emit/translate-machcode-to-asmcode-intel32-g.codemade.pkg
#     src/lib/compiler/back/low/pwrpc32/emit/translate-machcode-to-asmcode-pwrpc32-g.codemade.pkg
#     src/lib/compiler/back/low/sparc32/emit/translate-machcode-to-asmcode-sparc32-g.codemade.pkg
#
# These modules are mechanically generated from the architecture-description files by
#
#     src/lib/compiler/back/low/tools/arch/make-sourcecode-for-translate-machcode-to-asmcode-xxx-g-package.pkg
#
# To allow some architecture-independent manipulation of abstract machine code,
# all machcode implementations are required to support   Machcode_Universals   from
#
#     src/lib/compiler/back/low/code/machcode-universals.api

# Compiled by:
#     src/lib/compiler/back/low/lib/lowhalf.lib




stipulate
    package nt  =  note;                                                # note                          is from   src/lib/src/note.pkg
    package rkj =  registerkinds_junk;                                  # registerkinds_junk            is from   src/lib/compiler/back/low/code/registerkinds-junk.pkg
herein

    api Machcode_Form {
        #
        package rgk: Registerkinds;                                     # Registerkinds                 is from   src/lib/compiler/back/low/code/registerkinds.api

        Operand;                                                        # Operands supported by architecture.
        Addressing_Mode;                                                # Addressing mode.
        Effective_Address;                                              # Effective address for accessing memory.
        Base_Op;                                                        # Architecture instructions.

        Machine_Op                                                      # Machine instruction -- partially abstract.
          # 
          = LIVE { regs: rgk::Codetemplists, spilled: rgk::Codetemplists }
          | DEAD { regs: rgk::Codetemplists, spilled: rgk::Codetemplists }
          | NOTE { op:   Machine_Op,
                   note: nt::Note
                 }
          | BASE_OP  Base_Op
          | COPY  
              { kind: rkj::Registerkind, 
                size_in_bits: Int,                                      # in bits 
                dst: List( rkj::Codetemp_Info ), 
                src: List( rkj::Codetemp_Info ),
                tmp: Null_Or( Effective_Address )                       #  = NULL if |dst| = |src| = 1 
              };
    };
end;

## COPYRIGHT (c) 2002 Bell Labs, Lucent Technologies.
## Subsequent changes by Jeff Prothero Copyright (c) 2010-2013,
## released per terms of SMLNJ-COPYRIGHT.


Comments and suggestions to: bugs@mythryl.org

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