## machcode-pwrpc32.codemade.api
#
# This file generated at 2015-12-06:08:43:06 by
#
# src/lib/compiler/back/low/tools/arch/make-sourcecode-for-machcode-xxx-package.pkg#
# from the architecture description file
#
# src/lib/compiler/back/low/pwrpc32/pwrpc32.architecture-description
#
# Edits to this file will be LOST on next system rebuild.
# Compiled by:
# src/lib/compiler/back/low/pwrpc32/backend-pwrpc32.lib# This api specifies an abstract view of the PWRPC32 instruction set.
#
# The idea is that the Base_Op sumtype defines
# one constructor for each PWRPC32 machine instruction.
#
# Machcode allows us to do tasks like instruction selection and peephole optimization
# (not currently implemented) without yet worrying about the details of the actual
# target-architecture binary encoding of instructions.
#
# This file is a concrete instantiation of the general Machcode_Form api defined in:
#
# src/lib/compiler/back/low/code/machcode-form.api#
# At runtime our PWRPC32 machcode representation of the program being compiled is produced by
#
# src/lib/compiler/back/low/pwrpc32/treecode/translate-treecode-to-machcode-pwrpc32-g.pkg#
# Later, absolute executable binary machine code is produced by
#
# src/lib/compiler/back/low/pwrpc32/emit/translate-machcode-to-execode-pwrpc32-g.codemade.pkg#
# For display purposes, human-readable target-architecture assembly code is be produced
# from the machcode representation by
#
# src/lib/compiler/back/low/pwrpc32/emit/translate-machcode-to-asmcode-pwrpc32-g.codemade.pkg#
# This modules is mechanically generated from our architecture-description file by
#
# src/lib/compiler/back/low/tools/arch/make-sourcecode-for-translate-machcode-to-asmcode-xxx-g-package.pkg#
# This api is implemented in:
#
# src/lib/compiler/back/low/pwrpc32/code/machcode-pwrpc32-g.codemade.pkgstipulate
package lbl = codelabel; # codelabel is from src/lib/compiler/back/low/code/codelabel.pkg package nt = note; # note is from src/lib/src/note.pkg package rkj = registerkinds_junk; # registerkinds_junk is from src/lib/compiler/back/low/code/registerkinds-junk.pkgherein
api Machcode_Pwrpc32 {
#
package rgk: Registerkinds_Pwrpc32; # Registerkinds_Pwrpc32 is from src/lib/compiler/back/low/pwrpc32/code/registerkinds-pwrpc32.codemade.pkg package tcf: Treecode_Form; # Treecode_Form is from src/lib/compiler/back/low/treecode/treecode-form.api package lac: Late_Constant; # Late_Constant is from src/lib/compiler/back/low/code/late-constant.api package rgn: Ramregion; # Ramregion is from src/lib/compiler/back/low/code/ramregion.api
sharing lac == tcf::lac; # "lac" == "late_constant".
sharing rgn == tcf::rgn; # "rgn" == "region".
Gpr = Int;
Fpr = Int;
Ccr = Int;
Crf = Int;
Spr = XER
| LR
| CTR
;
Operand = REG_OP rkj::Codetemp_Info
| IMMED_OP Int
| LABEL_OP tcf::Label_Expression
;
Addressing_Mode = (rkj::Codetemp_Info, Operand);
Effective_Address = DIRECT rkj::Codetemp_Info
| FDIRECT rkj::Codetemp_Info
| DISPLACE { base: rkj::Codetemp_Info,
disp: tcf::Label_Expression,
ramregion: rgn::Ramregion
}
;
Load = LBZ
| LBZE
| LHZ
| LHZE
| LHA
| LHAE
| LWZ
| LWZE
| LDE
| LBZU
| LHZU
| LHAU
| LWZU
| LDZU
;
Store = STB
| STBE
| STH
| STHE
| STW
| STWE
| STDE
| STBU
| STHU
| STWU
| STDU
;
Fload = LFS
| LFSE
| LFD
| LFDE
| LFSU
| LFDU
;
Fstore = STFS
| STFSE
| STFD
| STFDE
| STFSU
| STFDU
;
Cmp = CMP
| CMPL
;
Fcmp = FCMPO
| FCMPU
;
Unary = NEG
| EXTSB
| EXTSH
| EXTSW
| CNTLZW
| CNTLZD
;
Funary = FMR
| FNEG
| FABS
| FNABS
| FSQRT
| FSQRTS
| FRSP
| FCTIW
| FCTIWZ
| FCTID
| FCTIDZ
| FCFID
;
Farith = FADD
| FSUB
| FMUL
| FDIV
| FADDS
| FSUBS
| FMULS
| FDIVS
;
Farith3 = FMADD
| FMADDS
| FMSUB
| FMSUBS
| FNMADD
| FNMADDS
| FNMSUB
| FNMSUBS
| FSEL
;
Bo = TRUE
| FALSE
| ALWAYS
| COUNTER { eq_zero: Bool,
cond: Null_Or( Bool )
}
;
Arith = ADD
| SUBF
| MULLW
| MULLD
| MULHW
| MULHWU
| DIVW
| DIVD
| DIVWU
| DIVDU
| AND
| OR
| XOR
| NAND
| NOR
| EQV
| ANDC
| ORC
| SLW
| SLD
| SRW
| SRD
| SRAW
| SRAD
;
Arithi = ADDI
| ADDIS
| SUBFIC
| MULLI
| ANDI_RC
| ANDIS_RC
| ORI
| ORIS
| XORI
| XORIS
| SRAWI
| SRADI
;
Rotate = RLWNM
| RLDCL
| RLDCR
;
Rotatei = RLWINM
| RLWIMI
| RLDICL
| RLDICR
| RLDIC
| RLDIMI
;
Ccarith = CRAND
| CROR
| CRXOR
| CRNAND
| CRNOR
| CREQV
| CRANDC
| CRORC
;
Bit = LT
| GT
| EQ
| SO
| FL
| FG
| FE
| FU
| FX
| FEX
| VX
| OX
;
Xerbit = SO64
| OV64
| CA64
| SO32
| OV32
| CA32
;
Cr_Bit = ((rkj::Codetemp_Info), Bit);
Base_Op = LL { ld: Load,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
| LF { ld: Fload,
ft: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
| ST { st: Store,
rs: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
| STF { st: Fstore,
fs: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
| UNARY { oper: Unary,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rc: Bool,
oe: Bool
}
| ARITH { oper: Arith,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: rkj::Codetemp_Info,
rc: Bool,
oe: Bool
}
| ARITHI { oper: Arithi,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
im: Operand
}
| ROTATE { oper: Rotate,
ra: rkj::Codetemp_Info,
rs: rkj::Codetemp_Info,
sh: rkj::Codetemp_Info,
mb: Int,
me: Null_Or( Int )
}
| ROTATEI { oper: Rotatei,
ra: rkj::Codetemp_Info,
rs: rkj::Codetemp_Info,
sh: Operand,
mb: Int,
me: Null_Or( Int )
}
| COMPARE { cmp: Cmp,
l: Bool,
bf: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: Operand
}
| FCOMPARE { cmp: Fcmp,
bf: rkj::Codetemp_Info,
fa: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info
}
| FUNARY { oper: Funary,
ft: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info,
rc: Bool
}
| FARITH { oper: Farith,
ft: rkj::Codetemp_Info,
fa: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info,
rc: Bool
}
| FARITH3 { oper: Farith3,
ft: rkj::Codetemp_Info,
fa: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info,
fc: rkj::Codetemp_Info,
rc: Bool
}
| CCARITH { oper: Ccarith,
bt: Cr_Bit,
ba: Cr_Bit,
bb: Cr_Bit
}
| MCRF { bf: rkj::Codetemp_Info,
bfa: rkj::Codetemp_Info
}
| MTSPR { rs: rkj::Codetemp_Info,
spr: rkj::Codetemp_Info
}
| MFSPR { rt: rkj::Codetemp_Info,
spr: rkj::Codetemp_Info
}
| LWARX { rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: rkj::Codetemp_Info
}
| STWCX { rs: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: rkj::Codetemp_Info
}
| TW { to: Int,
ra: rkj::Codetemp_Info,
si: Operand
}
| TD { to: Int,
ra: rkj::Codetemp_Info,
si: Operand
}
| BC { bo: Bo,
bf: rkj::Codetemp_Info,
bit: Bit,
address: Operand,
lk: Bool,
fall: Operand
}
| BCLR { bo: Bo,
bf: rkj::Codetemp_Info,
bit: Bit,
lk: Bool,
labels: List( lbl::Codelabel )
}
| BB { address: Operand,
lk: Bool
}
| CALL { def: rgk::Codetemplists,
uses: rgk::Codetemplists,
cuts_to: List( lbl::Codelabel ),
ramregion: rgn::Ramregion
}
| SOURCE { }
| SINK { }
| PHI { }
;
Machine_Op
= LIVE { regs: rgk::Codetemplists, spilled: rgk::Codetemplists }
| DEAD { regs: rgk::Codetemplists, spilled: rgk::Codetemplists }
#
| COPY { kind: rkj::Registerkind,
size_in_bits: Int,
dst: List( rkj::Codetemp_Info ),
src: List( rkj::Codetemp_Info ),
tmp: Null_Or( Effective_Address ) # NULL if |dst| == |src| == 1
}
#
| NOTE { op: Machine_Op,
note: nt::Note
}
#
| BASE_OP Base_Op
;
ll: { ld: Load,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
-> Machine_Op;
lf: { ld: Fload,
ft: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
-> Machine_Op;
st: { st: Store,
rs: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
-> Machine_Op;
stf: { st: Fstore,
fs: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
d: Operand,
ramregion: rgn::Ramregion
}
-> Machine_Op;
unary: { oper: Unary,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rc: Bool,
oe: Bool
}
-> Machine_Op;
arith: { oper: Arith,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: rkj::Codetemp_Info,
rc: Bool,
oe: Bool
}
-> Machine_Op;
arithi: { oper: Arithi,
rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
im: Operand
}
-> Machine_Op;
rotate: { oper: Rotate,
ra: rkj::Codetemp_Info,
rs: rkj::Codetemp_Info,
sh: rkj::Codetemp_Info,
mb: Int,
me: Null_Or( Int )
}
-> Machine_Op;
rotatei: { oper: Rotatei,
ra: rkj::Codetemp_Info,
rs: rkj::Codetemp_Info,
sh: Operand,
mb: Int,
me: Null_Or( Int )
}
-> Machine_Op;
compare: { cmp: Cmp,
l: Bool,
bf: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: Operand
}
-> Machine_Op;
fcompare: { cmp: Fcmp,
bf: rkj::Codetemp_Info,
fa: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info
}
-> Machine_Op;
funary: { oper: Funary,
ft: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info,
rc: Bool
}
-> Machine_Op;
farith: { oper: Farith,
ft: rkj::Codetemp_Info,
fa: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info,
rc: Bool
}
-> Machine_Op;
farith3: { oper: Farith3,
ft: rkj::Codetemp_Info,
fa: rkj::Codetemp_Info,
fb: rkj::Codetemp_Info,
fc: rkj::Codetemp_Info,
rc: Bool
}
-> Machine_Op;
ccarith: { oper: Ccarith,
bt: Cr_Bit,
ba: Cr_Bit,
bb: Cr_Bit
}
-> Machine_Op;
mcrf: { bf: rkj::Codetemp_Info,
bfa: rkj::Codetemp_Info
}
-> Machine_Op;
mtspr: { rs: rkj::Codetemp_Info,
spr: rkj::Codetemp_Info
}
-> Machine_Op;
mfspr: { rt: rkj::Codetemp_Info,
spr: rkj::Codetemp_Info
}
-> Machine_Op;
lwarx: { rt: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: rkj::Codetemp_Info
}
-> Machine_Op;
stwcx: { rs: rkj::Codetemp_Info,
ra: rkj::Codetemp_Info,
rb: rkj::Codetemp_Info
}
-> Machine_Op;
tw: { to: Int,
ra: rkj::Codetemp_Info,
si: Operand
}
-> Machine_Op;
td: { to: Int,
ra: rkj::Codetemp_Info,
si: Operand
}
-> Machine_Op;
bc: { bo: Bo,
bf: rkj::Codetemp_Info,
bit: Bit,
address: Operand,
lk: Bool,
fall: Operand
}
-> Machine_Op;
bclr: { bo: Bo,
bf: rkj::Codetemp_Info,
bit: Bit,
lk: Bool,
labels: List( lbl::Codelabel )
}
-> Machine_Op;
bb: { address: Operand,
lk: Bool
}
-> Machine_Op;
call: { def: rgk::Codetemplists,
uses: rgk::Codetemplists,
cuts_to: List( lbl::Codelabel ),
ramregion: rgn::Ramregion
}
-> Machine_Op;
source: { } -> Machine_Op;
sink: { } -> Machine_Op;
phi: { } -> Machine_Op;
};
end;