# regor-spill-types-g.pkg "regor" is a contraction of "register allocator"
# Compiled by:
#
src/lib/compiler/back/low/lib/lowhalf.lib# We get invoked from:
#
#
src/lib/compiler/back/low/regor/register-spilling-g.pkg#
src/lib/compiler/back/low/regor/register-spilling-with-renaming-g.pkgstipulate
package cig = codetemp_interference_graph; # codetemp_interference_graph is from
src/lib/compiler/back/low/regor/codetemp-interference-graph.pkg package rkj = registerkinds_junk; # registerkinds_junk is from
src/lib/compiler/back/low/code/registerkinds-junk.pkgherein
generic package regor_spill_types_g (
# ====================
#
mcf: Machcode_Form # Machcode_Form is from
src/lib/compiler/back/low/code/machcode-form.api )
# There is no API.
{
Copy_Instr
=
( ( List( rkj::Codetemp_Info ),
List( rkj::Codetemp_Info )
),
mcf::Machine_Op
)
-> List( mcf::Machine_Op );
# Spill the value associated with reg into spill_loc.
# All definitions of instruction should be renamed to a new temporary make_reg.
#
Spill
=
{ instruction: mcf::Machine_Op, # Instruction where spill is to occur
reg: rkj::Codetemp_Info, # Register to spill
spill_loc: cig::Spill_To, # Logical spill location
kill: Bool, # Can we kill the current node?
notes: Ref( note::Notes ) # Annotations
}
->
{ code: List( mcf::Machine_Op ), # Instruction + spill code
prohibitions: List( rkj::Codetemp_Info ), # Prohibited from future spilling
make_reg: Null_Or( rkj::Codetemp_Info ) # The spilled value is available here
};
# Spill the register src into spill_loc.
# The value is originally from register reg.
#
Spill_Src
=
{ src: rkj::Codetemp_Info, # Register to spill from
reg: rkj::Codetemp_Info, # The register
spill_loc: cig::Spill_To, # Logical spill location
notes: Ref( note::Notes ) # Annotations
}
->
List( mcf::Machine_Op ); # Spill code
# Spill the temporary associated with a copy into spill_loc
#
Spill_Copy_Tmp
=
{ copy: mcf::Machine_Op, # Copy to spill
reg: rkj::Codetemp_Info, # The register
spill_loc: cig::Spill_To, # Logical spill location
notes: Ref( note::Notes ) # Annotations
}
->
mcf::Machine_Op; # Spill code
# Reload the value associated
# with reg from spill_loc.
#
# All uses of instruction should be
# renamed to a new temporary make_reg.
#
Reload
=
{ instruction: mcf::Machine_Op, # Instruction where spill is to occur
reg: rkj::Codetemp_Info, # Register to spill
spill_loc: cig::Spill_To, # Logical spill location
notes: Ref( note::Notes ) # Annotations
}
->
{ code: List( mcf::Machine_Op ), # Instruction + reload code.
prohibitions: List( rkj::Codetemp_Info ), # Prohibited from future spilling.
make_reg: Null_Or( rkj::Codetemp_Info ) # The reloaded value is here.
};
# Rename all uses from_src to to_src
#
Rename_Src
=
{ instruction: mcf::Machine_Op, # Instruction where spill is to occur
from_src: rkj::Codetemp_Info, # Register to rename
to_src: rkj::Codetemp_Info # Register to rename to
}
->
{ code: List( mcf::Machine_Op ), # Renamed instruction
prohibitions: List( rkj::Codetemp_Info ), # Prohibited from future spilling
make_reg: Null_Or( rkj::Codetemp_Info ) # The renamed value is here
};
# Reload the register dst from spill_loc.
# The value is originally from register reg.
#
Reload_Dst
=
{ dst: rkj::Codetemp_Info, # Register to reload to
reg: rkj::Codetemp_Info, # The register
spill_loc: cig::Spill_To, # Logical spill location
notes: Ref( note::Notes ) # Annotations
}
->
List( mcf::Machine_Op ); # Reload code
};
end;