## machcode-intel32-g.codemade.pkg
#
# This file generated at 2015-12-06:08:43:06 by
#
# src/lib/compiler/back/low/tools/arch/make-sourcecode-for-machcode-xxx-package.pkg#
# from the architecture description file
#
# src/lib/compiler/back/low/intel32/intel32.architecture-description
#
# Edits to this file will be LOST on next system rebuild.
# Compiled by:
# src/lib/compiler/back/low/intel32/backend-intel32.lib# We are invoked from:
#
# src/lib/compiler/back/low/main/intel32/backend-lowhalf-intel32-g.pkgstipulate
package lbl = codelabel; # codelabel is from src/lib/compiler/back/low/code/codelabel.pkg package nt = note; # note is from src/lib/src/note.pkg package rkj = registerkinds_junk; # registerkinds_junk is from src/lib/compiler/back/low/code/registerkinds-junk.pkgherein
# Treecode_Form is from src/lib/compiler/back/low/treecode/treecode-form.api generic package machcode_intel32_g (
#
tcf: Treecode_Form
)
: (weak) Machcode_Intel32
{
# Machcode_Intel32 is from src/lib/compiler/back/low/intel32/code/machcode-intel32.codemade.api # Export to client packages:
#
package tcf = tcf;
package rgn = tcf::rgn; # "rgn" == "region".
package lac = tcf::lac; # "lac" == "late_constant".
package rgk = registerkinds_intel32; # registerkinds_intel32 is from src/lib/compiler/back/low/intel32/code/registerkinds-intel32.codemade.pkg
Operand = IMMED one_word_int::Int
| IMMED_LABEL tcf::Label_Expression
| RELATIVE Int
| LABEL_EA tcf::Label_Expression
| DIRECT rkj::Codetemp_Info
| FDIRECT rkj::Codetemp_Info
| FPR rkj::Codetemp_Info
| ST rkj::Codetemp_Info
| RAMREG rkj::Codetemp_Info
| DISPLACE { base: rkj::Codetemp_Info,
disp: Operand,
ramregion: rgn::Ramregion
}
| INDEXED { base: Null_Or( (rkj::Codetemp_Info) ),
index: rkj::Codetemp_Info,
scale: Int,
disp: Operand,
ramregion: rgn::Ramregion
}
;
Addressing_Mode = Operand;
Effective_Address = Operand;
Cond = EQ
| NE
| LT
| LE
| GT
| GE
| BB
| BE
| AA
| AE
| CC
| NC
| PP
| NP
| OO
| NO
;
Binary_Op = ADDL
| SUBL
| ANDL
| ORL
| XORL
| SHLL
| SARL
| SHRL
| MULL
| IMULL
| ADCL
| SBBL
| ADDW
| SUBW
| ANDW
| ORW
| XORW
| SHLW
| SARW
| SHRW
| MULW
| IMULW
| ADDB
| SUBB
| ANDB
| ORB
| XORB
| SHLB
| SARB
| SHRB
| MULB
| IMULB
| BTSW
| BTCW
| BTRW
| BTSL
| BTCL
| BTRL
| ROLW
| RORW
| ROLL
| RORL
| XCHGB
| XCHGW
| XCHGL
| LOCK_ADCW
| LOCK_ADCL
| LOCK_ADDW
| LOCK_ADDL
| LOCK_ANDW
| LOCK_ANDL
| LOCK_BTSW
| LOCK_BTSL
| LOCK_BTRW
| LOCK_BTRL
| LOCK_BTCW
| LOCK_BTCL
| LOCK_ORW
| LOCK_ORL
| LOCK_SBBW
| LOCK_SBBL
| LOCK_SUBW
| LOCK_SUBL
| LOCK_XORW
| LOCK_XORL
| LOCK_XADDB
| LOCK_XADDW
| LOCK_XADDL
;
Mult_Div_Op = IMULL1
| MULL1
| IDIVL1
| DIVL1
;
Unary_Op = DECL
| INCL
| NEGL
| NOTL
| DECW
| INCW
| NEGW
| NOTW
| DECB
| INCB
| NEGB
| NOTB
| LOCK_DECL
| LOCK_INCL
| LOCK_NEGL
| LOCK_NOTL
;
Shift_Op = SHLDL
| SHRDL
;
Bit_Op = BTW
| BTL
| LOCK_BTW
| LOCK_BTL
;
Move = MOVL
| MOVB
| MOVW
| MOVSWL
| MOVZWL
| MOVSBL
| MOVZBL
;
Fbin_Op = FADDP
| FADDS
| FMULP
| FMULS
| FCOMS
| FCOMPS
| FSUBP
| FSUBS
| FSUBRP
| FSUBRS
| FDIVP
| FDIVS
| FDIVRP
| FDIVRS
| FADDL
| FMULL
| FCOML
| FCOMPL
| FSUBL
| FSUBRL
| FDIVL
| FDIVRL
;
Fibin_Op = FIADDS
| FIMULS
| FICOMS
| FICOMPS
| FISUBS
| FISUBRS
| FIDIVS
| FIDIVRS
| FIADDL
| FIMULL
| FICOML
| FICOMPL
| FISUBL
| FISUBRL
| FIDIVL
| FIDIVRL
;
Fun_Op = FCHS
| FABS
| FTST
| FXAM
| FPTAN
| FPATAN
| FXTRACT
| FPREM1
| FDECSTP
| FINCSTP
| FPREM
| FYL2XP1
| FSQRT
| FSINCOS
| FRNDINT
| FSCALE
| FSIN
| FCOS
;
Fenv_Op = FLDENV
| FNLDENV
| FSTENV
| FNSTENV
;
Fsize = FP32
| FP64
| FP80
;
Isize = INT8
| INT16
| INT1
| INT2
;
Base_Op = NOP
| JMP (Operand, List( lbl::Codelabel ))
| JCC { cond: Cond,
operand: Operand
}
| CALL { operand: Operand,
defs: rgk::Codetemplists,
uses: rgk::Codetemplists,
return: rgk::Codetemplists,
cuts_to: List( lbl::Codelabel ),
ramregion: rgn::Ramregion,
pops: one_word_int::Int
}
| ENTER { src1: Operand,
src2: Operand
}
| LEAVE
| RET Null_Or( Operand )
| MOVE { mv_op: Move,
src: Operand,
dst: Operand
}
| LEA { r32: rkj::Codetemp_Info,
address: Operand
}
| CMPL { lsrc: Operand,
rsrc: Operand
}
| CMPW { lsrc: Operand,
rsrc: Operand
}
| CMPB { lsrc: Operand,
rsrc: Operand
}
| TESTL { lsrc: Operand,
rsrc: Operand
}
| TESTW { lsrc: Operand,
rsrc: Operand
}
| TESTB { lsrc: Operand,
rsrc: Operand
}
| BITOP { bit_op: Bit_Op,
lsrc: Operand,
rsrc: Operand
}
| BINARY { bin_op: Binary_Op,
src: Operand,
dst: Operand
}
| SHIFT { shift_op: Shift_Op,
src: Operand,
dst: Operand,
count: Operand
}
| CMPXCHG { lock: Bool,
size: Isize,
src: Operand,
dst: Operand
}
| MULTDIV { mult_div_op: Mult_Div_Op,
src: Operand
}
| MUL3 { dst: rkj::Codetemp_Info,
src2: one_word_int::Int,
src1: Operand
}
| UNARY { un_op: Unary_Op,
operand: Operand
}
| SET { cond: Cond,
operand: Operand
}
| CMOV { cond: Cond,
src: Operand,
dst: rkj::Codetemp_Info
}
| PUSHL Operand
| PUSHW Operand
| PUSHB Operand
| PUSHFD
| POPFD
| POP Operand
| CDQ
| INTO
| FBINARY { bin_op: Fbin_Op,
src: Operand,
dst: Operand
}
| FIBINARY { bin_op: Fibin_Op,
src: Operand
}
| FUNARY Fun_Op
| FUCOM Operand
| FUCOMP Operand
| FUCOMPP
| FCOMPP
| FCOMI Operand
| FCOMIP Operand
| FUCOMI Operand
| FUCOMIP Operand
| FXCH { operand: rkj::Codetemp_Info }
| FSTPL Operand
| FSTPS Operand
| FSTPT Operand
| FSTL Operand
| FSTS Operand
| FLD1
| FLDL2E
| FLDL2T
| FLDLG2
| FLDLN2
| FLDPI
| FLDZ
| FLDL Operand
| FLDS Operand
| FLDT Operand
| FILD Operand
| FILDL Operand
| FILDLL Operand
| FNSTSW
| FENV { fenv_op: Fenv_Op,
operand: Operand
}
| FMOVE { fsize: Fsize,
src: Operand,
dst: Operand
}
| FILOAD { isize: Isize,
ea: Operand,
dst: Operand
}
| FBINOP { fsize: Fsize,
bin_op: Fbin_Op,
lsrc: Operand,
rsrc: Operand,
dst: Operand
}
| FIBINOP { isize: Isize,
bin_op: Fibin_Op,
lsrc: Operand,
rsrc: Operand,
dst: Operand
}
| FUNOP { fsize: Fsize,
un_op: Fun_Op,
src: Operand,
dst: Operand
}
| FCMP { i: Bool,
fsize: Fsize,
lsrc: Operand,
rsrc: Operand
}
| SAHF
| LAHF
| SOURCE { }
| SINK { }
| PHI { }
;
Machine_Op
= LIVE { regs: rgk::Codetemplists, spilled: rgk::Codetemplists }
| DEAD { regs: rgk::Codetemplists, spilled: rgk::Codetemplists }
#
| COPY { kind: rkj::Registerkind,
size_in_bits: Int,
dst: List( rkj::Codetemp_Info ),
src: List( rkj::Codetemp_Info ),
tmp: Null_Or( Effective_Address ) # NULL if |dst| == |src| == 1
}
#
| NOTE { op: Machine_Op,
note: nt::Note
}
#
| BASE_OP Base_Op
;
nop = BASE_OP NOP;
jmp = BASE_OP o JMP;
jcc = BASE_OP o JCC;
call = BASE_OP o CALL;
enter = BASE_OP o ENTER;
leave = BASE_OP LEAVE;
ret = BASE_OP o RET;
move = BASE_OP o MOVE;
lea = BASE_OP o LEA;
cmpl = BASE_OP o CMPL;
cmpw = BASE_OP o CMPW;
cmpb = BASE_OP o CMPB;
testl = BASE_OP o TESTL;
testw = BASE_OP o TESTW;
testb = BASE_OP o TESTB;
bitop = BASE_OP o BITOP;
binary = BASE_OP o BINARY;
shift = BASE_OP o SHIFT;
cmpxchg = BASE_OP o CMPXCHG;
multdiv = BASE_OP o MULTDIV;
mul3 = BASE_OP o MUL3;
unary = BASE_OP o UNARY;
set = BASE_OP o SET;
cmov = BASE_OP o CMOV;
pushl = BASE_OP o PUSHL;
pushw = BASE_OP o PUSHW;
pushb = BASE_OP o PUSHB;
pushfd = BASE_OP PUSHFD;
popfd = BASE_OP POPFD;
pop = BASE_OP o POP;
cdq = BASE_OP CDQ;
into = BASE_OP INTO;
fbinary = BASE_OP o FBINARY;
fibinary = BASE_OP o FIBINARY;
funary = BASE_OP o FUNARY;
fucom = BASE_OP o FUCOM;
fucomp = BASE_OP o FUCOMP;
fucompp = BASE_OP FUCOMPP;
fcompp = BASE_OP FCOMPP;
fcomi = BASE_OP o FCOMI;
fcomip = BASE_OP o FCOMIP;
fucomi = BASE_OP o FUCOMI;
fucomip = BASE_OP o FUCOMIP;
fxch = BASE_OP o FXCH;
fstpl = BASE_OP o FSTPL;
fstps = BASE_OP o FSTPS;
fstpt = BASE_OP o FSTPT;
fstl = BASE_OP o FSTL;
fsts = BASE_OP o FSTS;
fld1 = BASE_OP FLD1;
fldl2e = BASE_OP FLDL2E;
fldl2t = BASE_OP FLDL2T;
fldlg2 = BASE_OP FLDLG2;
fldln2 = BASE_OP FLDLN2;
fldpi = BASE_OP FLDPI;
fldz = BASE_OP FLDZ;
fldl = BASE_OP o FLDL;
flds = BASE_OP o FLDS;
fldt = BASE_OP o FLDT;
fild = BASE_OP o FILD;
fildl = BASE_OP o FILDL;
fildll = BASE_OP o FILDLL;
fnstsw = BASE_OP FNSTSW;
fenv = BASE_OP o FENV;
fmove = BASE_OP o FMOVE;
fiload = BASE_OP o FILOAD;
fbinop = BASE_OP o FBINOP;
fibinop = BASE_OP o FIBINOP;
funop = BASE_OP o FUNOP;
fcmp = BASE_OP o FCMP;
sahf = BASE_OP SAHF;
lahf = BASE_OP LAHF;
source = BASE_OP o SOURCE;
sink = BASE_OP o SINK;
phi = BASE_OP o PHI;
};
end;