## machcode-address-of-ramreg-intel32-g.pkg
#
# The intel32 (x86) architecture is so register-starved that
# we allot some 'registers' on the stack -- both int and float.
# Here we implement a function to map "register id" to stack offset
# in such cases.
# Compiled by:
#
src/lib/compiler/mythryl-compiler-support-for-intel32.lib### "Happiness is nothing more than
### good health and a bad memory."
###
### -- Albert Schweitzer
# We are invoked from:
#
#
src/lib/compiler/back/low/main/intel32/backend-lowhalf-intel32-g.pkg#
stipulate
package lem = lowhalf_error_message; # lowhalf_error_message is from
src/lib/compiler/back/low/control/lowhalf-error-message.pkg package rnt = runtime_intel32; # runtime_intel32 is from
src/lib/compiler/back/low/main/intel32/runtime-intel32.pkg package rkj = registerkinds_junk; # registerkinds_junk is from
src/lib/compiler/back/low/code/registerkinds-junk.pkgherein
generic package machcode_address_of_ramreg_intel32_g (
# ===================================
#
mcf: Machcode_Intel32 # Machcode_Intel32 is from
src/lib/compiler/back/low/intel32/code/machcode-intel32.codemade.api )
# Commented out because we actually need the 'package mc' export as well:
# : Machcode_Address_Of_Ramreg_Intel32 # Machcode_Address_Of_Ramreg_Intel32 is from
src/lib/compiler/back/low/intel32/code/machcode-address-of-ramreg-intel32.api {
# Export client packages:
#
package mcf = mcf; # "mcf" == "machcode_form" (abstract machine code).
fun error msg
=
lem::impossible ("machcode_address_of_ramreg_intel32_g." + msg);
# This function gets invoked as ramregs::ramreg in
#
#
src/lib/compiler/back/low/intel32/emit/translate-machcode-to-asmcode-intel32-g.codemade.pkg #
fun ramreg { reg, base }
=
{ # see intel32::prim::asm stack layout
fun fp_disp f # "fp" is "floating point" (register).
=
one_word_int::from_int((rkj::intrakind_register_id_of f - 8) * 8 + rnt::v_fp_start); # v_fp_start + (id(f)-8) *8)
fun gp_disp r # "gp" is "general purpose" (register). (I.e., vanilla int register.)
=
one_word_int::from_int # vreg_start + ((id(r)-8) *4)
(rnt::vreg_start +
unt::to_int_x(
unt::(<<) (unt::from_int (rkj::intrakind_register_id_of r - 8), 0u2)));
case reg
#
mcf::FDIRECT f => mcf::DISPLACE { base, disp=>mcf::IMMED (fp_disp f), ramregion=>mcf::rgn::stack };
mcf::RAMREG r => mcf::DISPLACE { base, disp=>mcf::IMMED (gp_disp r), ramregion=>mcf::rgn::stack };
#
_ => error "ramreg";
esac;
};
};
end;