## spill-instructions-pwrpc32-g.pkg
# Compiled by:
# src/lib/compiler/back/low/pwrpc32/backend-pwrpc32.lib# PWRPC32 instructions to emit when spilling an instruction.
### "In a few years, all great physical constants
### will have been approximately estimated, and
### that the only occupation which will be left
### to men of science will be to carry these
### measurements to another place of decimals."
###
### -- James C. Maxwell
# We are invoked from:
#
# src/lib/compiler/back/low/main/pwrpc32/backend-lowhalf-pwrpc32.pkgstipulate
package lem = lowhalf_error_message; # lowhalf_error_message is from src/lib/compiler/back/low/control/lowhalf-error-message.pkg package rkj = registerkinds_junk; # registerkinds_junk is from src/lib/compiler/back/low/code/registerkinds-junk.pkgherein
generic package spill_instructions_pwrpc32_g (
# ========================
#
package mcf: Machcode_Pwrpc32; # Machcode_Pwrpc32 is from src/lib/compiler/back/low/pwrpc32/code/machcode-pwrpc32.codemade.api )
: (weak) Architecture_Specific_Spill_Instructions # Architecture_Specific_Spill_Instructions is from src/lib/compiler/back/low/regor/arch-spill-instruction.api {
# Export to client packages:
#
package mcf = mcf; # "mcf" == "machcode_form" (abstract machine code).
stipulate
package rewrite
=
instructions_rewrite_pwrpc32_g ( # instructions_rewrite_pwrpc32_g is from src/lib/compiler/back/low/pwrpc32/regor/instructions-rewrite-pwrpc32-g.pkg mcf # "mcf" == "machcode_form" (abstract machine code).
);
package rgk = mcf::rgk; # "rgk" == "registerkinds".
herein
fun error msg
=
lem::error ("spill_instructions_pwrpc32_g", msg);
fun store_to_ea rkj::INT_REGISTER (reg, mcf::DISPLACE { base, disp, ramregion } )
=>
mcf::st { st=>mcf::STW, rs=>reg, ra=>base, d=>mcf::LABEL_OP disp, ramregion };
store_to_ea rkj::FLOAT_REGISTER (freg, mcf::DISPLACE { base, disp, ramregion } )
=>
mcf::stf { st=>mcf::STFD, ra=>base, d=>mcf::LABEL_OP disp, fs=>freg, ramregion };
store_to_ea _ _ => error "storeToEA";
end;
fun load_from_ea rkj::INT_REGISTER (reg, mcf::DISPLACE { base, disp, ramregion } )
=>
mcf::ll { ld=>mcf::LWZ, ra=>base, d=>mcf::LABEL_OP disp, rt=>reg, ramregion };
load_from_ea rkj::FLOAT_REGISTER (freg, mcf::DISPLACE { base, disp, ramregion } )
=>
mcf::lf { ld=>mcf::LFD, ra=>base, d=>mcf::LABEL_OP disp, ft=>freg, ramregion };
load_from_ea _ _ => error "loadFromEA";
end;
fun spill_to_ea ck reg_ea
=
{ code => [store_to_ea ck reg_ea], prohibitions => [], make_reg=>NULL };
fun reload_from_ea ck reg_ea
=
{ code => [load_from_ea ck reg_ea], prohibitions => [], make_reg=>NULL };
# Spill a register to spill_loc:
#
fun spill_r (instruction, reg, ea)
=
{ new_r = rgk::make_int_codetemp_info ();
instruction' = rewrite::rewrite_def (instruction, reg, new_r);
{ code => [instruction', store_to_ea rkj::INT_REGISTER (new_r, ea)],
prohibitions => [new_r],
make_reg=>THE new_r
};
};
fun spill_f (instruction, reg, ea)
=
{ new_r = rgk::make_float_codetemp_info ();
#
instruction' = rewrite::frewrite_def (instruction, reg, new_r);
{ code => [instruction', store_to_ea rkj::FLOAT_REGISTER (new_r, ea)],
prohibitions => [new_r],
make_reg=>THE new_r
};
};
# Reload a register from spill_loc:
#
fun reload_r (instruction, reg, ea)
=
{ new_r = rgk::make_int_codetemp_info ();
#
instruction' = rewrite::rewrite_use (instruction, reg, new_r);
{ code => [load_from_ea rkj::INT_REGISTER (new_r, ea), instruction'],
prohibitions => [new_r],
make_reg=>THE new_r
};
};
fun reload_f (instruction, reg, ea)
=
{ new_r = rgk::make_float_codetemp_info ();
#
instruction' = rewrite::frewrite_use (instruction, reg, new_r);
{ code => [load_from_ea rkj::FLOAT_REGISTER (new_r, ea), instruction'],
prohibitions => [new_r],
make_reg=>THE new_r
};
};
fun spill rkj::INT_REGISTER => spill_r;
spill rkj::FLOAT_REGISTER => spill_f;
spill _ => error "spill";
end;
fun reload rkj::INT_REGISTER => reload_r;
reload rkj::FLOAT_REGISTER => reload_f;
reload _ => error "reload";
end;
end;
};
end;
## COPYRIGHT (c) 2002 Bell Labs, Lucent Technologies
## Subsequent changes by Jeff Prothero Copyright (c) 2010-2015,
## released per terms of SMLNJ-COPYRIGHT.