15.4.289  src/lib/compiler/back/low/main/main/spill-table-g.pkg

# spill-table-g.pkg

# Compiled by:
#     src/lib/compiler/core.sublib

# We are invoked from:
#
#     src/lib/compiler/back/low/main/pwrpc32/backend-lowhalf-pwrpc32.pkg
#     src/lib/compiler/back/low/main/sparc32/backend-lowhalf-sparc32.pkg
#     

stipulate
    package lem =  lowhalf_error_message;                       # lowhalf_error_message                 is from   src/lib/compiler/back/low/control/lowhalf-error-message.pkg
    package cig =  codetemp_interference_graph;                 # codetemp_interference_graph           is from   src/lib/compiler/back/low/regor/codetemp-interference-graph.pkg
    package sma =  supported_architectures;                     # supported_architectures               is from   src/lib/compiler/front/basics/main/supported-architectures.pkg
herein

    generic package   spill_table_g   (
        #             =============
        #
        mp:  Machine_Properties                                 # Machine_Properties                    is from   src/lib/compiler/back/low/main/main/machine-properties.api
                                                                # machine_properties_pwrpc32            is from   src/lib/compiler/back/low/main/pwrpc32/machine-properties-pwrpc32.pkg
                                                                # machine_properties_sparc32            is from   src/lib/compiler/back/low/main/sparc32/machine-properties-sparc32.pkg
    )
    : (weak) 
    api {
        spill_init:    Void -> Void;
        get_reg_loc:   cig::Spill_To -> Int;
        get_freg_loc:  cig::Spill_To -> Int;

    }
    {


        fun error msg
            =
            lem::error (arch + ".spill_table_g", msg)
            where
                arch =  (sma::architecture_name  mp::machine_architecture);             # "pwrpc32", "sparc32" or "intel32".
            end;

        itow = unt::from_int;

        exception REGISTER_SPILLS also FLOAT_REGISTER_SPILLS;

        spill_offset = REF mp::initial_spill_offset;

        my  regspills:  cig::spill_loc_hashtable::Hashtable( Int )
            =
            cig::spill_loc_hashtable::make_hashtable  { size_hint => 0,  not_found_exception => REGISTER_SPILLS };

        my  fregspills:  cig::spill_loc_hashtable::Hashtable( Int )
            =
            cig::spill_loc_hashtable::make_hashtable  { size_hint =>0,  not_found_exception => FLOAT_REGISTER_SPILLS };

        lookup_reg  = cig::spill_loc_hashtable::get regspills;
        enter_reg   = cig::spill_loc_hashtable::set  regspills;

        lookup_freg = cig::spill_loc_hashtable::get fregspills;
        enter_freg  = cig::spill_loc_hashtable::set  fregspills;

        fun spill_init ()
            =
            {   #  Reset the regspills/fregspills map by need. 
                if (*spill_offset != mp::initial_spill_offset)

                     cig::spill_loc_hashtable::clear   regspills;
                     cig::spill_loc_hashtable::clear  fregspills;
                fi;

                spill_offset := mp::initial_spill_offset;
            };

        fun new_offset offset
            =
            if (offset >= mp::spill_area_size)   error "spill area too small";
            else spill_offset := offset;
            fi;

        # Get spill location for integer registers 
        #
        fun get_reg_loc loc
            =
            lookup_reg loc
            except
                _ = {   offset = *spill_offset;
                        new_offset (offset+4);
                        enter_reg (loc, offset);
                        offset;
                    };

        #  Get spill location for floating point registers 
        #
        fun get_freg_loc loc
            =
            lookup_freg loc
            except
                _ =
                    {   offset = *spill_offset;
                        aligned = unt::to_int_x (unt::bitwise_and (itow (offset+7), itow -8));

                        new_offset (aligned+8);
                        enter_freg (loc, aligned);
                        aligned;
                    };

    };
end;